The present invention relates generally to semiconductor device processing and, more particularly, to improving the planarization of organic polymers used as low-k dielectrics in semiconductor structures.
In the fabrication of integrated circuit devices, it is often desirable to isolate individual components of the integrated circuits from one another with insulative materials. Such insulative materials may include, for example, silicon dioxide, silicon nitride and silicon carbide. While these materials may have acceptable insulating properties in many applications, they also have relatively high dielectric constants, which can lead to capacitive coupling between proximate conductive elements. This is particularly disadvantageous, given the ever-decreasing distances between conductive circuit elements, and the use of multi-layered structures. An unnecessary capacitive coupling between adjacent wires increases the RC time delay of a signal propagated therethrough, resulting in decreased device performance. Thus, for specific applications, insulating materials having relatively low dielectric constants (e.g., xcexa less than 3) are desired.
Certain organic polymers are known in the semiconductor manufacturing industry for their xe2x80x9clow-kxe2x80x9d dielectric properties, which polymers are often used for intermetallic insulation in damascene structures. An example of one such polymer is SiLK(copyright), manufactured by The Dow Chemical Company. SiLK(copyright) is typically applied to semiconductor wafers by spin-on coating in a wafer track, similar to the process used in the application of photolithography resist. Initially in liquid form during the spin-on coating, the SiLK(copyright) material dries relatively quickly after the coating, thereby creating peaks and valleys of topography as it blankets device features having distinct step heights.
The following discussed drawbacks and deficiencies of the prior art are overcome or alleviated by a method for forming a planarized dielectric layer upon a semiconductor wafer. In an exemplary embodiment of the invention, the method includes applying an adhesion promoter to the wafer, thereby forming an adhesion promoter layer. A dielectric material is applied in a spin-on fashion upon the adhesion promoter layer at a relative humidity of less than 40% and for a thickness setting duration of less than 30 seconds. Then, the dielectric material is dried by baking without additional spinning of the semiconductor wafer.
In a preferred embodiment, the thickness setting duration is about 12 to about 16 seconds and the dielectric material is applied at a relative humidity of less than 35%. Following the drying of the dielectric material, any dielectric edge beads formed upon the semiconductor wafer are removed by applying a solvent thereto. The dielectric material is then cured by baking at about 400xc2x0 C. The adhesion promoter layer is also cured, prior to applying the dielectric material by baking at about 185xc2x0 C.